B9948 Datasheet | Cypress

3.3V, 160-MHz, 1:12 Clock Distribution Buffer Features - - - - - - - - - - 160-MHz clock support LVPECL or LVCMOS/LVTTL clock input LVCMOS/LVTTL patible inputs 12 clock outputs: drive up to 24 clock lines Synchronous Output Enable Output three-state control 350-ps maximum output-to-output skew Pin patible with MPC948 Industrial temp. range: - 40°C to +85°C 32-pin TQFP package Description The B9948 is a low-voltage clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL patible input clock. The two clock sources can be used to provide for a test clock as well as the primary system clock. All other control inputs are LVCMOS/LVTTL...